The
PCB Group

www.pcbco.com.au

N0. 18 Tuas South Street 3
Jurong Industrial Estate, Singapore

Phone: +65 6862-0802
Fax +65 6862-0800
Email: info@pcbco.com.au

Universal Printed Circuit Board
Design Guide

Each PCB design is unique and requires the skills of the designer to adapt the design to fall within PCB manufacturing capabilities.

A good design will however focus on being as far removed from the manufacturing limits as practically possible. By doing this, manufacturing yield rates can be optimised, and better long term reliability achieved.

It does not take much skill in laying out a 12 layer board with 5Mil track and 0.2mm vias in order to achieve the connectivity required. On the other hand, laying out a complex single sided board (or even double sided board) which has to be optimised for product manufacturability takes considerably more time and considerably more skill.

The following guidelines are generalisations that from our experience are often neglected or not understood by many designers.

1) BOARD OUTLINE: Define the boards outline using a mechanical layer. All PCB design packages have mechanical layers for this purpose. Make the outline trace thin 0.1Mil or less. This way there is no ambiguity as to which edge of the line is the intended edge of the boards. The "keepout" layer, "silkscreen" layer or any other copper layer are not intended to define boards outlines, so do not use them for this purpose. Some PCB manufacturers insist that on Protel designs, mechanical layer 1 must be used. As a result we suggest that this is probably a reasonable defacto standard for Protel designs. For CADint designs, the Board outline 1 layer should be used.

2) CLEARANCE TO EDGE OF BOARD. Keep the clearance of any copper to the edge of the board as large as possible. Routed edges should have at least 1.0mm clearance. V-Groove edges should have more. This is not a PCB manufacturing constraint, but rather a product reliability issue. If the copper is too close to the edge, the circuit may be manufactured with an exposed copper track, which could lead to corrosion. The fibreglass laminate absorbs moisture. If the track is close to the edge it will be exposed to a higher level of moisture rendering it susceptible to long term reliability problems. Increased clearance of a track to the edge of a board also reduces the possibility of track damage due to mishandling. A board manufactured with exposed copper edges does not meet IPC standards.

3) TRACK WIDTH AND SEPARATION. Unless you are trying to maintain a controlled impedance, keep track width and spacing as large as possible. Track spacing should be 20% more than track width. So 8Mil tracks should have a 10Mil spacing. 5Mil tracks should have 6Mil spacing. 15Mil track should have 18Mil spacing.

4) FILLED POLYGONS. Fill unused area with copper fills. Use solid copper fills and not hatched areas. Connect them to the ground (0v) net on one side of the board and a supply rail to the other. This will give you a number of benefits. The capacitive coupling between the planes will reduce noise on the supply rails and also reduce EMI radiation. The copper mass will conduct heat and even out hot spots on the board. The thicker conduction path provides a cleaner voltage rail and reduced voltage drop to the components. Capacitive coupling between signal traces and the ground plane reduces noise on the signal line. The copper is already there on the bare laminate, why not use it. Allow 50% more clearance from the polygon fill to the track and pads as compared to the average track to track clearance.

5) CRITICAL DIMENSIONS. If the PCB has any critical tolerances, clearly show them on a spare mechanical layer along with the acceptable tolerances for those dimensions. Make sure that if the critical dimension relates to the board outline, that the board outline trace matches those dimensions. As a manufacturer, we will analise the tolerance and determine how to best manufacture the PCB within that tolerance.

6) PLATED AND UNPLATED HOLES. Most CAD packages support plated and un-plated holes. Ensure the holes you want unplated are defined as such. Un-plated holes normally do not have copper pads around the edge of the hole. If this is the case make the pads 20% smaller than the hole. This eliminates the possibility of leaving copper moons at the edge of the hole in the event of a misalignment, while ensuring there is a solder mask relief that will not block the hole.

7) PAD SIZE AROUND VIAS. We often get asked how much bigger than the via, a pad should be. We can actually manufacture boards without any pad area around the via hole. Tracks only needs to make contact with the via wall to achieve connectivity. The problem is that the point where the track meets the plated via wall will be susceptible to fracture as a result of thermal, and possibly mechanical stress. As a result, this would provide poor long term reliability. So the answer is "As big as possible". The larger the pad the greater the reliability and the higher the manufacturing yield rate. As a general rule, smaller holes (0.3mm) require a large pad as the drill has a tendency to distort during drilling and hence the positional accuracy is not as great as a larger size hole. The benefit of using a small via hole in order to achieve greater board density is somewhat lost as the pad size needs to be maintained large to compensate for the positional distortion of the drill.

8) PAD SIZE AROUND HOLES. This constraint is more so related to product assembly rather than PCB manufacturing. If the pad is small, the constraints on the soldering process are tightened. In addition the pad provides for mechanical support of the component. A small pad only has a small surface area to bond to the laminate material and so will provide less mechanical support to the component lead. With through hole plated boards, the hole plating itself supports the component pin, so pad area is not an issue. However, for single sided boards a large pad area is essential. The larger the better.

9) VIA TENTING. Via tenting consists of covering the via with solder mask. There are two types of via tenting, "PAD ONLY" (with open hole) or "PAD and HOLE" (closing off the hole). If tented vias are required you must supply the design file that has tented vias designed into it. Depending on the design package used, there are various ways of achieving this. In addition the PCB manufacturer must be informed that the design incorporates tented vias and the type of tenting required. In most cases, whether vias are tented or not makes very little difference to the PCB in terms of manufacturability or long term reliability. Therefore, whether vias are tented or not, becomes an arbitrary issue.

10) SILK SCREEN COMPONENT LEGEND. Most PCB designs have little time spent in tidying up the legend text/markings on the board. In addition, PCBs which are designed on old versions of PROTEL and then imported into a later version have text translation problems causing the text to be enlarged in the order of 20%. As a result PCB manufacturers often find text overlapping copper pad areas. This translates into soldering problems on both through hole component pads and also SMD component pads. As part of our tooling process we digitally remove any part of the text which overlays a copper pad. If you have specifically designed a board with text overlaying a copper pad you must indicate to us that the silkscreen prints must not be modified.

11) PANELISATION. PCB circuits often need to be panelised together to aid in the component assembly process. Usually a panel consists of two or more circuit boards combined together with the addition of tooling strips containing tooling holes and fiducial marks. The PCB Company P/L provides the service of panelising customer designs, however it must be understood that the process of designing a panel is in fact a design process. The design has to take into consideration any constraints in the component loading process, as well as optimisation of numerous parameters to achieve the best/most cost effective configuration. If panelisation is required and the design is not already in a panelised format, ensure that panelisation details are clearly defined in your requirements.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Copyright © 2004 The PCB Company Pty Ltd  All rights reserved - Last modified: Jan 18th 2016

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